Matt,
The Galileo _needs_ an expansion board like this.
As it now is, it just shows what happens
when a tribe that shrinks heads gets hold of a MinnowBoard.
That _has_ a second PCIe Port.
The Galileo doesn't though
the Quark X1000 on it does.
But it isn't pinned out!
Since the Gerber files for "Your Old Gal"
_still_ are not in the public domain,
I can't tell whether it _might_ be possible
for a superb tech to expose the now-hidden second PCIe port.
And so if I were going to scope out what you're thinking of doing,
I would buy a MinnowBoard with a Break-Out-Board for $189
and use _them_ to rough things out.
The one thing that simply _has_ to be on the "BOB"
is an FPGA that the CPU interacts with via
its second PCIe port.
What is behind the FPGA on the "BOB" is TBD.
But for starters, it could be a "local bus"
that is 16/32 bits wide and provides access
to the rest of the "BOB"'s prototyping area.*
And/Or a CPU of some ilk that would provide a _working_
"Uno"/"Duo" interface for off-the-shelf "shields". That's
what is going to be done on the "Tre" , I believe.
Ideally the FPGA you choose would have a
hard-coded PCIe interface. But the FPGA's
that I know about that do aren't inexpensive.
I've experimented with the Lattice Semi
ECP3 Versa Board and the free Diamond Software,
which runs well on my Linux boxes. If I were
where you are, I'd contact them when the rain stops
and try to find out what they have now or in the pipeline
that might meet your needs.
Though I do not have a Galileo or a Minnow Board
to test the software I've built, I have been able
to build systems of various ilks for the MinnowBoard
(and BeagleBoards) using "poky-dora-10.0.1.tar.gz" and
"dora-10.0.1.final.tar.gz" Never thought I'd see
the word "final" at yoctoproject.org.
Windily,
BC Bill
*
Fifteen plus years ago, Intel had an IC -- the i960VH --
with a PCI "front door" and a 32-bit "back door"
that I used on a project for a large firm that
now prefers to sell sizzle rather than bacon.